Hardware Acceleration of Apache Spark on Energy-Efficient FPGAs

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In this talk, we will present SPynq framework: A framework for the efficient mapping and acceleration of Spark applications on heterogeneous all-programmable MPSoC-based platforms, such as Zynq. Spark has been mapped to the Pynq platform and the proposed framework allows the seamlessly utilization of the programmable logic for the hardware acceleration of computational intensive Spark kernels. We have also developed the required libraries in Spark, by extending the MLLib library, that hides the accelerator’s details to minimize the design effort to utilize the accelerators. A cluster of 4 nodes (workers) based on the all-programmable MPSoCs has been implemented and the proposed platform is evaluated in a typical machine learning application based on logistic regression. The logistic regression kernel has been developed as an accelerator and incorporated to the Spark. The developed system is compared to a high-performance Xeon cluster that is typically used in cloud computing. The performance evaluation shows that the heterogeneous accelerator-based MpSoC can achieve up to 2.3x system speedup compared with a Xeon system (with 90% accuracy) and 20x better energy-efficiency. For embedded application, the proposed system can achieve up to 40x speedup compared to the software only implementation on low-power embedded processors and 30x lower energy consumption.
Session hashtag: #EUres8

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About Christoforos Kachris

Christoforos Kachris is a senior researcher and project manager at the Institute of Communication and Computer Systems (ICCS-NTUA) in Athens, Greece. His main expertise in on hardware acceleration of applications like network processing, image processing, high performance and cloud computing. He has over 15 years of experience on FPGAs (reconfigurable computing), digital design, embedded systems (SoCs), and HW/SW co-design mainly in network processing, microservers, optical interconnects, and telecommunication systems. Currently he is the Technical Project Manager of the H2020 VINEYARD project working on efficient utilization of hardware accelerator-based servers for data analytics.